The present invention relates to a non-volatile semiconductor memory device having non-volatile memory elements controlled by control gates.
As an example of a non-volatile semiconductor memory device, a MONOS (Metal-Oxide-Nitride-Oxide-Semiconductor or -Substrate) non-volatile semiconductor memory device is known. In the MONOS non-volatile semiconductor memory device, a gate insulating layer between a channel and a gate is formed of a laminate consisting of a silicon oxide film, a silicon nitride film, and a silicon oxide film, and electric charge is trapped in the silicon nitride film.
The MONOS non-volatile semiconductor memory device was disclosed by Y. Hayashi, et al, in 2000 Symposium on VLSI Technology Digest of Technical Papers, pp. 122-123. This literature discloses a MONOS flash memory cell including two non-volatile memory elements (MONOS memory elements) controlled by one word gate and two control gates. Specifically, one flash memory cell has two charge trap sites, and two bits of data are stored in one cell.
A memory cell array is formed by arranging a plurality of MONOS flash memory cells having such a structure in a row direction and a column direction.
A case where one of the memory elements of the memory cell is a selected cell and the other memory element is a non-selected cell (hereinafter called “opposite cell”) is described below. When reading data from the selected cell, a select voltage is supplied to the control gate of the selected cell and an override voltage is supplied to the control gate of the opposite cell. 0 V is supplied to the control gates of the non-selected cells other than the opposite cell.
The override voltage is a voltage necessary for allowing a read current or a program current to flow by causing a transistor of the opposite cell to be turned on irrespective of the presence or absence of a program in the opposite cell.
The override voltage when reading data and the select voltage and the override voltage when programming data are higher than a power supply voltage. These voltages are supplied from a booster circuit.
As a conventional problem in this type of non-volatile semiconductor memory device, it is necessary to increase the speed of read operation. However, a considerable period of time is needed to raise the voltage of the control gate line from 0 V to a final voltage.